PIC32MX795F512L Configuration Bit Settings. More...
#include <xc.h>
Go to the source code of this file.
Macros | |
| #define | SYSCLK 80000000L |
| System clock frequency, in Hz. More... | |
Detailed Description
PIC32MX795F512L Configuration Bit Settings.
Macro Definition Documentation
◆ SYSCLK
| #define SYSCLK 80000000L |
System clock frequency, in Hz.
< SRS Select (SRS Priority 7) Ethernet RMII/MII Enable (MII Enabled) Ethernet I/O Pin Select (Default Ethernet I/O) CAN I/O Pin Select (Default CAN I/O) USB USID Selection (Controlled by the USB Module) USB VBUS ON Selection (Controlled by USB Module) <PBCLK de 40Mhz -> PLL Input Divider (2x Divider) PLL Multiplier (20x Multiplier) USB PLL Input Divider (12x Divider) USB PLL Enable (Disabled and Bypassed) System PLL Output Clock Divider (PLL Divide by 1) < Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL)) Secondary Oscillator Enable (Enabled) Internal/External Switch Over (Enabled) Primary Oscillator Configuration (HS osc mode) CLKO Output Signal Active on the OSCO Pin (Disabled) Peripheral Clock Divisor (Pb_Clk is Sys_Clk/2) Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled) Watchdog Timer Postscaler (1:1048576) Watchdog Timer Enable (WDT Enabled) < Background Debugger Enable (Debugger is disabled) ICE/ICD Comm Channel Select (ICE EMUC2/EMUD2 pins shared with PGC2/PGD2) Program Flash Write Protect (Disable) Boot Flash Write Protect bit (Protection Disabled) Code Protect (Protection Disabled)
